;*******************************************************************************
; MC-Genjin CD                                                                 *
;*******************************************************************************
; Memory Map
;-------------------------------------------------------------------------------
; In Normal / Startup mode (upon reset) the lower 1MB region of memory for
; HuCards is arranged as follows :
;
; $000000 - $03FFFF : Lower 256KB of ROM
; $040000 - $07FFFF : Upper 256KB of ROM or Secondary 256KB RAM Bank
; $080000 - $0BFFFF : Selected 256KB RAM Bank
; $0C0000 - $0FFFFF : Highest 256KB RAM Bank
;
; Once LINEAR RAM MODE is enabled, the card region will contain a map of the
; lower 1MB of RAM. It will remain in this mode until the console is reset.
;
; $000000 - $0FFFFF : Lower 1MB RAM
;


; MC-Genjin Header
;-------------------------------------------------------------------------------
; As the MC-Genjin CD is an MC-Genjin derivative mapper, an MC-Genjin header
; should be included from $1FD0 to $1FDF in the ROM residing on the card.
;
; The contents below should be used, appearing as follows after being mapped
; into MPR7 ($FFD0 - $FFDF).
;
; $FFD0 - $FFD7 : "MCGENJIN"
;
; $FFD8         : MC-Genjin Revision
;                 $CD == MC-Genjin CD
;
; $FFD9         : ROM Size in 256KB Pages
;                 $02 == 512KB of ROM
;
; $FFDA         : Native Region
;                 $00 == US/EU
;                 $01 == JP
;
; $FFDB         : User Chipselect 0 Device
;                 $15 == 256KB SRAM
; $FFDC         : User Chipselect 1 Device
;                 $15 == 256KB SRAM
;
; $FFDD - $FFDF : Future Expansion (set to zero)
;


; Registers
;-------------------------------------------------------------------------------
; All registers are write-only and accessed by writing anywhere in the
; $000000 - $03FFFF region. Register access is completely disabled upon a
; switch into linear RAM mode.
;
; Note that unlike a normal MC-Genjin, _only_ the Region Control register does
; not account for the current operating region (dataline transposition). All
; other registers such as the RAM Bank Select and Linear Mode Unlock will
; properly reverse written data bits. Therefore, when setting the system region
; at startup it is best just to write $00 for native / unswapped or $FF for
; foriegn / swapping enabled.
;
;
; +Writes to %00 addresses control UPPER ROM ENABLING
;                      76543210
;     High ROM Enable: xxxxxxxR, Reset = xxxxxxx0
;     R = When set, the upper 256KB of ROM from $40000 - $7FFFF will be
;     replaced with the LOWER RAM BANK (selected using register %01).
;     Note that any writes to this register will also reset
;     the linear mode unlock sequence.
;
; -Writes to %01 addresses select the LOWER RAM BANK
;                      76543210
;     RAM Bank Select: xxxxxBBB, Reset = xxxxx000
;     BB = A20-A18 of the lower 256KB RAM Bank ($40000 - $7FFFF)
;     Note that any writes to this register will also reset
;     the linear mode unlock sequence.
;
; +Writes to %10 addresses control REGION and LINEAR MODE
;                      76543210
;     Region Control:  xxxxxxxS, Reset = xxxxxxx0
;     Upon reset, this register controls the system region (dataline reversal
;     enable). Once a region has been selected (writing '0' for no reversal
;     or '1' to request dataline reversal), this register's purpose
;     will change to control LINEAR RAM MODE UNLOCKING.
;
;                      76543210
;     Linear Unlock:   KKKKKKKK
;     To request a switch into linear RAM mode, the two ASCII
;     characters "HU" must be written to this register in order.
;     Once in linear RAM mode, all register access will be
;     disabled until the system is reset.
;
; -Writes to %11 addresses select the UPPER RAM BANK
;                      76543210
;     RAM Bank Select: xxxxxBBB, Reset = xxxxx000
;     BB = A20-A18 of the upper 256KB RAM Bank ($80000 - $BFFFF)
;     Note that any writes to this register will also reset
;     the linear mode unlock sequence.
;