;*******************************************************************************
; MC-Genjin Standards and Practices                                            *
;*******************************************************************************
; Requirements for an MC-Genjin Program
;-------------------------------------------------------------------------------
; * Software must operate properly in both the TurboGrafx-16 and PC-Engine
;   without the use of any additional hardware such as region converters.
;
; * Software must include a valid header (see below).
;
; * If slower-grade CPLDs are used, changing a ROM Bank while currently
;   executing from it is not recommended.
;
; * If slower-grade ROMs are used, connect their CEn and OEn pins directly to
;   A20 from the HuCard slot or enable them at all times (connect to GND).
;


; Hardware Gotcha's
;-------------------------------------------------------------------------------
; * ROM Banks default to page zero on power up.
;
; * While the mapper can switch the order of the ROM dataline reads, writes are
;   unaltered on the original MC-Genjin.
;
;   This means that any writes to the mapper registers (such as bank changes)
;   must be reversed in software when running under a "swapped" region.
;
; * Additionally, if you've connected nonvolatile memory (such as FRAM) or
;   anything other than SRAM (where the order wouldn't matter) to the user
;   chipselects, the reads and writes to these are not swapped.
;
; * The user chipselects really are just active-low outputs triggered when any
;   accesses occur in their pertinent regions, connect whatever you like.
;
; * The original MC-Genjin will block ROM reads until RESETn has risen.
;   Some consoles (in particular the TurboGrafx-16) have a behavioral quirk
;   where RESETn on the card slot will not reach a valid logic high until long
;   after the CPU has already started executing.
;
;   If your MC-Genjin or derivative mapper experiences startup instability, I
;   advise removing this behavior from the mapper HDL and allow ROM reads to be
;   performed whether or not RESETn has risen.
;
;   For example, this was removed in the MC-Genjin CD and a delay loop was
;   added prior to the first mapper write to compensate.
;


; Standard Header Format
;-------------------------------------------------------------------------------
; The 16-Byte header starts at address $1FD0 in the card, and is available at
; $FFD0 (MPR7) upon console reset.
;
; $FFD0 - $FFD7 : "MCGENJIN"
;
; $FFD8         : MC-Genjin Revision
;                 $00 == MC-Genjin (8MB ROM, User CS0, User CS1)
;                 $80 == Mednafen Reserved
;                 $CD == MC-Genjin CD, (512KB ROM, 2MB RAM)
;
; $FFD9         : ROM Size in 256KB Pages
;                 $00 == No ROM
;                 $01 == 256KB
;                 ...
;                 $20 == 8MB
;
; $FFDA         : Native Region
;                 $00 == US/EU
;                 $01 == JP
;
; $FFDB         : User Chipselect 0 Device (see list below)
; $FFDC         : User Chipselect 1 Device (see list below)
;
; $FFDD - $FFDF : Future Expansion (set to zero)
;


; Examples
;---------------------------------------
.orga $ffd0
MCGENJIN_FLAG:	.db "MCGENJIN"		; MC-Genjin 4MB Plus
MCGENJIN_REV:	.db $00			; - MC-Genjin
MCGENJIN_PAGES:	.db $10			; - 4MB ROM (16 Pages of 256KB each)
MCGENJIN_NREG:	.db $00			; - US Native
MCGENJIN_UCS_0:	.db $20			; - 8KB FRAM on User CS0
MCGENJIN_UCS_1:	.db $14			; - 128KB SRAM on User CS1
MGGENJIN_PAD:	.db 0,0,0

.orga $ffd0
MCGENJIN_FLAG:	.db "MCGENJIN"		; CD Stupid Card 4.0
MCGENJIN_REV:	.db $CD			; - MC-Genjin CD
MCGENJIN_PAGES:	.db $02			; - 512KB of ROM
MCGENJIN_NREG:	.db $00			; - US Native
MCGENJIN_UCS_0:	.db $15			; - 256KB SRAM on User CS0
MCGENJIN_UCS_1:	.db $15			; - 256KB SRAM on User CS1
MGGENJIN_PAD:	.db 0,0,0


; User Chipselect Device Types
;-------------------------------------------------------------------------------
; The table below contains a list of known devices which may be connected to the
; user chipselects of an MC-Genjin enabled card and their identification number.
;
; Value	Device
; -----	------
; $00	Nothing Connected
;
; $10	8KB SRAM
; $11	16KB SRAM
; $12	32KB SRAM
; $13	64KB SRAM
; $14	128KB SRAM
; $15	256KB SRAM
;
; $20	8KB FRAM
; $21	16KB FRAM
; $22	32KB FRAM
; $23	64KB FRAM
; $24	128KB FRAM
; $25	256KB FRAM
;